Re: Request for the next VHDL-AMS release

I like the C interface idea, which should be the most common language in
the engineering and science community.
Also I checked that SV DPI-C interface, it seems to be a simplified
interface between SystemVerilog and C for functions and procedures callls
(VHDL equivalent). It is complementary to VPI/PLI in verilog.

Does this mean that VHDL community may have the same interest in developing
such an interface as a complementary interface?

Regards,
Zhichao


On Tue, Sep 25, 2012 at 3:18 PM, David Smith <David.Smith@synopsys.com>wrote:

>  We are getting requests from customers requesting a standardized format
> for the interface to foreign routines. This is something that currently
> does not exist in the LRM and causes portability problems. I can foresee a
> solution that makes use of the Direct-C work done in SystemVerilog to
> provide a relatively low cost interface between the simulator and a routine
> written in C (or any language that support C compatible calling
> conventions).****
>
> ** **
>
> Is this something we can add to the work for the next VHDL-AMS?****
>
> ** **
>
> Regards****
>
> David****
>
> ** **
>
> David W. Smith****
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