RE: Question on encryption

Jim,
 
Good suggestion, we have thought about this option
too.  However, the binaries are not exchangeable
between tools, so they are still a tool specific
solution.  The goal would be to have a tool
independent solution.
 
If we could have all tools use the same binary it
may be a solution, but my understanding is that
this can't be done due to compiler differences.
 
Arpad
===================================================

________________________________

From: owner-vhdl-ams@server.eda.org [mailto:owner-vhdl-ams@server.eda.org] On Behalf Of holmes
Sent: Monday, April 24, 2006 9:31 PM
To: vhdl-ams@server.eda.org
Subject: RE: Question on encryption



Hello,

 

From a model delivery and IP protection standpoint, how is an encrypted VHDL-AMS model different from (or better than) a compiled VHDL-AMS model?  Doesn't customer have to compile the encrypted model anyway?

 

Regards,

Jim Holmes

 

 

 

________________________________

From: owner-vhdl-ams@eda.org [mailto:owner-vhdl-ams@eda.org] On Behalf Of Thuy Tran N
Sent: Monday, April 24, 2006 10:01 PM
To: Ernst Christen; Muranyi, Arpad
Cc: vhdl-ams@eda.org
Subject: Re: Question on encryption

 

Hi Ernst:

 

I'd like the reply you draft below.  Thank you very much for the information you lead us to for a reviewing.

 

Arpad, you are agreeing with me that Ernst is very good, are not you?

 

Thank you very much.

 

ThuyTTN

Ernst Christen <Ernst.Christen@synopsys.com> wrote:

	Hi Arpad,
	
	Encryption is a topic that comes up from time to time. The issue is not specific to 
	VHDL-AMS, but affects also VHDL (IEEE Std 1076). A proposal has been submitted to the VHDL 
	Analysis and Standardization Group (VASG) to support encryption in a VHDL text. You can 
	find some information about the topic by following the VHDL-200x link under P1076 at 
	eda.org. Go to Old VHDL-FT documents, near the bottom there are links to relevant 
	documents. There is also a presentation at 
	http://www.accellera.org/apps/group_public/download.php/118/VHDL_IP_Encryption.ppt.
	
	Thanks.
	Ernst Christen
	
	On Mon, 24 Apr 2006 11:25:32 -0700, Muranyi, Arpad wrote:
	> Hello everyone,
	>
	> Sorry for bringing up such off topic questions all the time,
	> but I would like to find out whether encryption has been
	> considered by the workgroup for VHDL-AMS models.
	>
	> The reason I am asking is because this has been brought up
	> in the recent IBIS Open Forum discussions in connection
	> with modeling bleeding edge high speed buffers behaviorally.
	> Semiconductor vendors feel increasingly uneasy about
	> releasing even behavioral models for such buffers without
	> encryption. In addition we do not like the idea of using
	> the individual and proprietary encryption schemes of EDA
	> vendors, because that would require the model makers to
	> encrypt the same model multiple times for each tool. It
	> seems that there is a strong need for some sort of a tool
	> independent encryption scheme.
	>
	> We thought we should look around what has been done, if
	> anything, before we reinventing the wheel.
	>
	> Thanks,
	>
	> Arpad
	> =============================================================
	
	
	
	
	




Thuy NT Tran 
Project Manager, Jr
www.pyrotest.com