(r2) TopLCS2016_063 < P1076

P1076 Web>Vhdl2019CollectedRequirements>TopLCS2016_063 (revision 2) (raw view)~~EditAttach~~
---+ LCS for Signal expressions connected mapped to a signal in parameter - Addresses Level Sensitive Wait

---++ 

| <sticky><b>LCS Number:</b></sticky> | LCS-2016-063 |
| <sticky><b>Version:</b>   </sticky> | 2 {31-Jan-2017} %BR% 1 {05-Jan-2017} |
| <sticky><b>Date:</b>      </sticky> | 31-Jan-2017 |
| <sticky><b>Status:</b>    </sticky> | Voting |
| <sticky><b>Author:</b>    </sticky> | Jim Lewis |
| <sticky><b>Email:</b>     </sticky> | [[Main.JimLewis]] |
| <sticky><b>Source Doc:</b></sticky> | [[WaitLevel][Signal expressions connected mapped to a signal in parameter]] |
| <sticky><b>Summary:</b>   </sticky> | Signal expressions connected mapped to a signal in parameter - addresses Level Sensitive Wait |

---+++ Voting Results: Cast your votes here

Yes:

   1 
   1 %USERSIG{LievenLemiengre - 2017-01-27}% ver 1

No:
   1 %USERSIG{JimLewis - 2017-01-31}% ver 2 - technical issues in proposal for which I do not have an answer at this time.  It really requires the expressions to be an implicit signal with zero delay, similar to 'delayed.    This is much different than ports.

Abstain:
   1 %USERSIG{MartinZabel - 2017-02-10}% ver 2 - I don't know whether a dynamic construction and elaboration of signal declaration and assignment is possible.
   1 %USERSIG{BrentHahoe - 2017-02-16}% Version 2 - Abstain due to lack of personal time for review.
   1 %USERSIG{MartinThompson- 2017-02-17}% Version 2 - Abstain due to lack of personal time for review.

---++ Revision Notes

Revision 2:
   * Changes last added paragraph of p22 - the one that creates the implicit signal
   * Added example to 4.2.2.3

---++ Style Notes

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<sticky>
Changes are shown in %RED%red font%ENDCOLOR%.  
Deletions are %RED%<del>crossed out</del>%ENDCOLOR%. 
Editing notes in %GREEN%green font%ENDCOLOR%. 
 
---++ Analysis
The approach here is to facilitate an approach that uses subprograms
to implement this feature.   The key limitation to subprograms implementing
this issue is being able to pass a signal class expression to a subprogram.

This analysis borrows generously from LCS-2006-122, Signal expressions in Port maps

OTOH, creating language syntax for a level sensitive wait statement could
potentially be done, but it would not provide as much benefit as 
Signal expressions in signal parameter maps.


---++ Details of Language Change
 
---+++ Section 4.2.2.1 Formal parameter lists
---++++ Edit page 21, 3rd paragraph:
In a subprogram call, the actual designator (see 6.5.7.1) 
associated with a formal parameter of class signal shall be 
%RED%either%ENDCOLOR% a name denoting a signal %RED% or an expression%ENDCOLOR%. 
The actual designator associated with a formal of class 
variable shall be a name denoting a variable. 
The actual designator associated with a formal of class 
constant shall be an expression. 
The actual designator associated with a formal of class 
file shall be a name denoting a file.

---++++ Section 4.2.2.3 Signal parameters
---+++++ <font color="green">[Edit: page 22, paragraph 7 as follows]</font>
<font color="red">If an actual signal or expression is associated 
with a signal parameter 
of mode in, and if the type of the formal is a
scalar type, then it is an error if the subtype of the 
actual is not compatible with the subtype of the formal.</font>
If an actual signal is associated with a signal parameter 
of mode <font color="red"><strike>in or</strike></font> 
inout, and if the type of the formal is a
scalar type, then it is an error if the subtype of the 
actual is not compatible with the subtype of the formal.
Similarly, if an actual signal is associated with a signal 
parameter of mode out or inout, and if the type of the
actual is a scalar type, then it is an error if the subtype 
of the formal is not compatible with the subtype of the
actual.

---+++++ <font color="green">[Edit: page 22, last paragraph as follows]</font>
<font color="red"><strike>For a formal parameter of a composite subtype,</strike>
If a formal signal parameter of a composite subtype of any mode is 
associated with an actual parameter that is a signal,</font>
the index ranges of the formal, if it is an array, and of any
array subelements, are determined as specified in 5.3.2.2. 
It is an error if the actual signal does not contain a
matching subelement for each subelement of the formal. 
It is also an error if the mode of the formal is in or
inout and if the value of each scalar subelement of the 
actual does not belong to the subtype of the
corresponding subelement of the formal.

---+++++ <font color="green">[Add: page 22, after paragraph above.
Sizing rules when expression is connected to a formal with 
that is a composite which is unconstrained or partially constrained.
Adapted from LCS-2006-122]</font>

<font color="red">If a formal signal parameter of mode in is associated with an expression and the
formal is of an unconstrained or partially constrained composite 
type requiring determination of index
ranges from the actual according to the rules of 5.3.2.2, then the expression 
shall be one of the following:<br>
? The name of an object whose subtype is globally static<br>
? An indexed name whose prefix is one of the members of this list<br>
? A slice name whose prefix is one of the members of this list and whose discrete range is a globally
static discrete range<br>
? An aggregate, provided all choices are locally static and all expressions in element associations are
expressions described in this list<br>
? A function call whose return type mark denotes a globally static subtype<br>
? A qualified expression or type conversion whose type mark denotes a globally static subtype<br>
? An expression described in this list and enclosed in parentheses
</font>

---+++++ <font color="green">[Add: page 22, after paragraph above.
Creates of an implicit signal for the expression. 
Adapted from LCS-2006-122]</font>

<font color="red">If the actual part of a given association element for a formal signal 
parameter of a subprogram is the reserved word inertial
followed by an expression, or is an expression, and the subprogram call is enclosed 
within an architecture body, block statement, or generate statement, then 
the given association element is equivalent to association of the parameter 
with an anonymous signal implicitly declared in the architecture declarative part or 
block declarative part that immediately encloses the subprogram call. 
The signal has the same subtype as the formal parameter and is the
target of an implicit concurrent signal assignment statement of the form<br>
anonymous <= E;<br>
where E is the expression in the actual part of the given association element. 
Any loop index or variable referenced in the expression is replaced 
by the current value of the loop index or variable.  
The signal declaration is initialized to the current value of E.
The concurrent signal assignment statement occurs in the architecture statement part or 
block statement part that immediately encloses the subprogram call.  

It is an error if the actual part of a given association element for a formal signal 
parameter of a subprogram is the reserved word inertial
followed by an expression, or is an expression, and the subprogram call is 
not enclosed 
within an architecture body, block statement, or generate statement.
</font>


---+++++ <font color="green">[Add: page 23, after notes at end of 4.2.2.3]</font>
<font color="red">Example:</font>
<pre>
<font color="red">
-- Procedure call with expression mapped to signal parameter
architecture Arch is 
    procedure WaitForCond (signal S : boolean ; ... ) ; 
begin
    process 
    begin
      ...
      WaitForCond(A = 5, ...) ;
      
-- Equivalent design with expression transformed to a signal assignment
architecture Arch is 
    procedure WaitForCond (signal S : boolean ; ... ) ; 
    signal anonymous : boolean ; 
begin
    anonymous <= A = 5 ; 
    process 
    begin
      ...
      WaitForCond(anonymous, ...) ;
</font></pre>


---+++ 6.5.7.1 General (of Association lists)
---++++ <font color="green">[Edit: page 83, last paragraph before notes]</font>
It is an error if the reserved word inertial appears in an association element other 
than in a port <font color="red">or parameter</font> map aspect.

---+++ Section 14.6 Dynamic Elaboration
---++++ <font color="green">[Edit/Add Page 213, paragraph part of list starting with b)]</font>
b) Execution of a subprogram call involves the elaboration of the parameter association list. 
This involves the elaboration of the parameter association element or elements in 
the association list associated with each interface declaration. 
Elaboration of the parameter association elements associated
with a formal parameter declaration proceeds as follows:<br>
1) The subtype indication of the corresponding formal parameter declaration is elaborated.<br>
2) The formal part or parts of the parameter association elements corresponding to the formal
parameter declaration are elaborated.<br>
3) If the type of the formal parameter is an array type or contains a subelement that is of an array
type, the rules of 5.3.2.2 are applied to determine the index ranges.<br>
4) <font color="red">If the actual in a parameter association element that corresponds to 
a formal signal parameter with mode in is an expression, 
then elaboration of the parameter association element consists of 
constructing and elaborating the equivalent anonymous signal declaration,
concurrent signal assignment statement and parameter association element (see 4.2.2.3); 
the parameter or subelement or slice thereof designated by the formal part 
is then associated with the anonymous signal.  Otherwise, for
<strike>For</strike></font>
each parameter association element associated with the formal parameter declaration, the
parameter or subelement or slice thereof designated by the formal part is then associated with
the actual part.<br>
5) If the formal parameter is a variable of mode out, then the implicit initial value for the object is
determined.


<br>
<br>
---++ Comments 



The title of this LCS is misleading

-- %BUBBLESIG{LievenLemiengre - 2017-01-27}%


This LCS requires that signals can be declared in subprograms, processes, or even sequential blocks (if LCS-2016-007 is approved) because these may be the &#34;enclosing block&#34; of the subprogram call. This is not possible in the current LRM and not addressed in this LCS. Consider the following example:

<verbatim>
entity e is
  port (
    x : in  bit;
    y : out bit);
end entity e;

architecture a of e is

  function f1 (signal x : bit) return bit is
  begin
    return not x;
  end function;

  function f2 (signal x : bit) return bit is
  begin
    return f1(not x);
  end function f2;

begin  -- architecture a

  process(x)
  begin
    y <= f2(not x);
  end process;

end architecture a;
</verbatim>

-- %BUBBLESIG{MartinZabel - 2017-01-30}%


@MZ  %RED% I deleted my incorrect late night analysis

-- %BUBBLESIG{JimLewis - 2017-01-30}%


@MZ, my intent is that the signal and signal declaration are contained in the enclosing concurrent declaration.   It is not clear that the current text, &#34;then the given association element is equivalent to association of the parameter with an anonymous signal implicitly declared in the declarative region that immediately encloses the block.&#34;  actually accomplishes this.  


-- %BUBBLESIG{JimLewis - 2017-01-31}%


@JL What is the initial value of the signal in the subprogram, how does the delta cycle delay associated with the signal impact the execution of the code.    

-- %BUBBLESIG{JimLewis - 2017-01-31}%


Revision 2 posted.   Addresses issues above of @MZ and @JL above.

-- %BUBBLESIG{JimLewis - 2017-01-31}%


Updated revision 2 to identify subprograms that are called with an expression in a signal parameter but are not in an architecture body, block statement, or generate statement as an error.   Hence, I think this only excludes subprogram calls done in a package body - which largely do not have a reason for a signal expression on the parameter.

-- %BUBBLESIG{JimLewis - 2017-01-31}%
%COMMENT%</sticky>

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Topic revision: r1 - 2020-02-17 - 15:34:41 - TWikiGuest
P1076