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---+ 2.     Introduction

An interface is an abstract representation of the connectivity and communication between two or more objects. This abstract representation may be implemented with one or more language features. It is the intent of this paper to review what requirements could be, discuss potential use models, and discuss potential implementations.  It should be noted that while an interface could be a specific language feature, it could also be a methodology that combines a set of features (existing, extended, and/or new).

Requirements from Accellera VHDL-TC enhancements spreadsheet:

FT-17-1 More concise representation to specify complex interfaces (supporting for example transactors, complex buses) (perhaps by using record type with element modes)
   * should be considered with OO
   * should be considered with transaction
   * should be synthesizable

FT-17-3 ensure that it can create a synthesizeable level of abstraction

Interfaces were discussed on the IEEE VHDL-200X working group reflector. The following list of potential requirements/features/properties/implementations were discussed as part of that effort:
   1 Group related data items (SB1). Similar to a record?
   1 Define behavior in a manner that can be reused within the design (SB2)
   1 Support multiple levels of abstraction (signals vs. bus operations vs. groups of operations (init)) (SB3)
   1 Support a &ldquo;procedure like&rdquo; call interface (SB3). Perhaps a procedure, but could be something else.
   1 User of interface only needs to understand the call interface. Implementation could be serial or parallel transmission. (SB4)
   1 Procedure interface does not block the caller (SB5)
   1 Contractual relationship that defines the &ldquo;procedures&rdquo; required of an implementation. (SB6)
   1 Support hierarchical connectivity between entities (SB7)
   1 Interface should be extendable and/or parameterizable via generics (SB8)
   1 Ability to specify delay at the interface (SB9)
   1 Support limited access to data items such that the value can only be accessed by a method in the interface.
   1 Interface should be configurable to select and/or remap any of the above during a given elaboration
   1 An entity port list can have multiple interfaces (interfaces here being more like a composite type and not a separate IO list).
   1 Support decomposition of the system (from system level to rtl level and/or ?gate-level?)
   1 Support mixed models in system (system-level mixed with rtl-level of a given interface. ?gate-level?)
   1 Support modeling of multiple independent operations
   1 Avoid known quirks and issues with implementations in other languages

Before potential implementations can be discussed, use models must be considered. From the use models, important features should become more obvious.
Topic revision: r1 - 2015-08-03 - 17:01:36 - BrentHahoe
P1076/Ballots