P1076 March 24, 2016 Meeting Minutes

Attendees:

Rob Gaddi, Brent Hayhoe, Ernst Christen, Lieven Lemiengre, Peter Flake, Ryan Hinton, Patrick Lehmann

Agenda:

Meeting Discussion

• What's Next - see PrivateDocuments file: _summary_vhdl_requirements_priority.xlsx
• Lieven has some work done on integers, but we'll hold that until the next meeting when we can make it the (agenda) focus of the discussion.
• 54 - Interfaces: Packages as an Interface Construct
  • Part of the bundles discussion. Waiting until Jim Lewis gets back.
• 55 - Implicit Parameter and Port Connections
  • Concern that this is a potentially dangerous language feature, bringing in some of SV's problems.
  • Most of the underlying problem goes away with bundles.
• 56 - Syntax Regularlization
  
  • Optionality of things in the "end" has support.
    • What's the history on this?
  • EVERYONE wants optional trailing semi-colons and commas in lists.
    • Rob will attempt.
  • Optional "is" gets harder
    • Need to check whether this makes the grammar ambiguous
    • Generally in favor if it's workable.
    • "is" should NOT be optional on case statements, subprogram definitions.
    • Current rule seems to be that if it's a statement, the "is" is required, but if it's a design entity then it's not, but that's empirical and doesn't hold for "component" Currently optional on "block", "process", "component"
    • Is optional "begin" an option as well? If so how, where, and can it be made consistent?
• 57 - Process ALL and Implicit Signals
  • Useful for allowing 'transaction in the sensitivity list when it will NOT be appearing in the text below.
  • Is this linked to the anonymous events discussion of a couple meetings ago?
  • Let's get a use case before we take much action.
• 58 - External Non-Shared Variable Name
  • Use case is grey box verification probing of designs under test. Ryan raises the issue of old code that is not modifyable by policy, and the advantage of being able to get into it.
  • Tristan's last comment is a key problem; what happens with atomicity? Especially if you've got multiple CPU cores doing true simultaneous execution of processes.
  • Atomicity can be worked around by making the inspection process timing "inherantly safe" w.r.t. the sourcing process.
  • Breaks the fundamental determinicity of VHDL simulation. Could have the environment declare a runtime error if the inspected variable changes in the same delta cycle.
  • How big a performance hit would adding these checks be?
  • Seems to require various flags be set on a process once that process is noted as having an external variable reference pointed at it.
  • Causes problems with optimization of variables.
• 59 - Integer and Integer_vector conversions
  • Lacking a use case that makes it a really compelling issue.
  • OS-VVM uses integer_vector heavily in CoveragePkg, including to make boolean choices.
  • Seems a better candidate for an open source package than an IEEE library.

-- RobGaddi - 2016-03-24

Review and Approve Meeting Minutes:

Approved Lieven, Ernst.

Next Meeting: Thursday March 31, 11 am Pacific

Previous Meeting: Thursday March 10 2016