(r11) 2014_MeetingApr3 < P1076

P1076 Web>Vhdl2019MeetingMinutes>2014_MeetingApr3 (revision 11) (raw view)~~EditAttach~~
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---+!! P1076 April 3, 2014 Meeting Minutes
---++!! Attendees:
   * Main.PeterFlake * Main.JimLewis * Main.CliffordWalinsky * Main.StevenDovich
---++!! Agenda:

%TOC%

---++ Group Action Item List
   * All: Review [[http://www.eda.org/twiki/bin/view.cgi/P1076/Vhdl2019ActiveIRTwiki][ISAC Accepted Items Review]]
   * All: Rank Proposals
   * All: Review Proposals
---++ Action Item Review

*Marked completed before meeting*
   * [[EnvStop][done]] Jim -207: Stop in environment package. Return values ambigous as to what can be done with them.
   * [[FloatInstance][done]] Jim 230 - Need FPGA/ASIC specific instances of float_pkg - send email to reflector
   * [[NaturalVector][done]] Jim - natural_vector see [[2012_MeetingNovember8][Nov 8 2012 meeting]]
   * [[MoveText][done]] Jim - 257 -definitions for TEXT, OUTPUT, and INPUT from std.textio to std.standard
   * [[SyntaxEntityComponent][done]] Jim - 258 - syntax regularization between entity and component
   * [[MapSubprogramGenericOnCall][done]] Jim - Generics on Usage of Subprograms [[2012_MeetingJuly19]]
   * done - Jim - Add separate table for collected requirements that do not have an owner
   * [[UpdateStdLogicArith][done]] Jim - Updates to non-standard package std_logic_arith [[MeetingFebruary16]] 
      * Cliff to look into reports about differences between numeric_std and std_logic_arith
   * [[ClockedShorthand][done]] - Done previously - clocked short hand [[MeetingJanuary5]]
   * Added to open source package list - create open source boost/C++ like libraries
   * Added to open source package list - RTL Macros
   * Done - Jim - promote synthesis items from the [[MeetingAugust11]] list to the Collected requirements page

*Check status during meeting*
   * Open - revive 1076.6 to handle syntheis proposals on collected requirements page [[MeetingAugust25]] [[MeetingAugust11]] 
      * Package of attributes in 1076?
   * [[AssertionDirectives][Assertions as Directives]] - Synthesizable Assertions [[MeetingAugust25]] [[MeetingAugust11]]
   * [[KeywordScope][Reject]] - Scope of keywords - see [[2012_MeetingAugust2]] 
      * Will increase compiler complexity significantly - may be a bad idea
      * User opinion: Compile language version switch working well. If you want to use the newest version, don't use the new keywords as identifiers.
      * Recommend that we drop it.
   * [[PslHarmonization][Added to Open List]] PSL harmonization - need to recruit someone
   * Ryan: Arbitrary width float: see [[2012_MeetingNovember8][Nov 8 2012 meeting]]
   * Open - Multi dimensional Array restructuring: Array &lt;--&gt; Matrix Transformations [[2012_MeetingJuly19]] [[MeetingDecember15]]
   * Ryan - Slicing Multidimensional Arrays (FT15) maybe related to above [[2012_MeetingMay24]]
   * David Bishop: Bugzilla 17 - add_carry in numeric_std as well as fixed/floating packages 
      * Is it already in the fixed and floating point packages?
   * David Bishop: Bugzilla 15 - Should numeric_bit/std have resize with size_res parameter? 
      * David proposed it for consistency with the fixed and floating point packages
   * David Bishop - 262 - Fixed Generic Pkg and checking valid range
   * [[AlternatePathName][Done]] Peter - 293 - copy proposed resolution in bugzilla in proposal
   * Open - Fork and Join [[2012_MeetingJune21]] 
      * Original Verilog, simple fork and join - not used much. Hence, not much value in implementing a simple mechanism
      * SV - more complicated and have ability to kill later
   * Jim - Mark bugzillas for which we have a proposal with that status
   * Jim - Table driven modeling via protected types [[2012_MeetingMay10]]
   * David Koontz - Simulation Controls [[MeetingAugust11]]
---++ [[Vhdl2019ActiveIRTwiki][ISAC Accepted Items Review]]
   * Make sure all items have a tracking proposal
   * Open - IR 2108 - Level sensitive check - A "wait" that checks condition before stopping 
      * Cliff - Look into passing an expression to a input signal parameter (2008 allows this for an input signal port)
   * Jim - 2109 - Requests semaphore implementation via a protected type 
      * Requires wait inside of a protected type
      * ?Requires signal inside of a protected type?
      * Also interested in a resolution function based semaphore implementation
   * Jim - 2113 - Init ROM / Array data structure using file read 
      * Add textio read to 1076.6 list
      * Add open source family of read array functions to initialize RAM/ROM
   * Cliff - 2119 - declare a protected type and object of that type in a single package
   * Jim - 2125 - Resolving 'Z' and '-' results in 'X" rather than '-'
   * Jim - 2003 - simulating and synthesizing multi-cycle paths 
      * Waveform assignment (multiple after) would be appropriate here, if a synthesis tool can handle it.
   * Jim - 2007 add link in bidirectional connections proposal to 2007
   * Jim - 2009 - add link from conditional compilation proposal to this and vice versa.
   * Jim - 2011 - Syntax that creates a component declaration from an entity decalaration and puts it into a specified package 
      * VHDL-93 supports direct entity instantiation
      * Methodology - use one package per component
      * Write up and put on reject list
   * Peter - 2012 - Wants to remove the priority from if-elsif-elsif structures under some conditions. Proposes: "if elsor elsor".
   * Jim - 2021 - Link into [[DynamicRewiring]]
---++ Review and Approve Meeting Minutes:
   * Motion: Cliff 2nd:Steven
---++ Next Meeting: [[2014_MeetingMay1][Thursday May 1, 2014]] 8 am Pacific
---+++ Previous Meeting: [[2014_MeetingMar20][Thursday March 20, 2014]]
Topic revision: r1 - 2020-02-17 - 15:50:29 - TWikiGuest
P1076