(r4) 2012_MeetingApril5 < P1076

P1076 Web>Vhdl2019MeetingMinutes>2012_MeetingApril5 (revision 4) (raw view)~~EditAttach~~
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---+ P1076 April 5, 2012 Meeting Minutes
Approved on May 10, 2012
---++ Attendees:
   * Main.ColinPaulGloster * Main.JimLewis * Main.PeterFlake * Main.JarekKaczynski

---++ Agenda:
   * Approve [[2012_MeetingMarch15][March 15]] Minutes. Motion: Colin Paul Gloster 2nd: Jarek Kaczynski
   * Call for proposals for new items
   * Call for volunteers to work on proposals
   * Looking for team leader for ISAC
   * Review updated proposals 
      * [[http://www.eda.org/twiki/bin/view.cgi/P1076/WebRss][RSS of recent changes]]
   * Review requirements lists from VHDL-200X/Accellera effort 
      * Assign owners to raw items and work toward proposals
   * Review items in the [[http://www.eda.org/twiki/bin/view.cgi/P1076/Vhdl2019CollectedRequirements][collected requirements list]]
   * Review [[IssueScreening][ISAC issues and Bugzilla]]
---++ DPI
   * Peter: Worked on example calling to C Random Number library
   * Ready for Jerry to look into implementation issues
---++ ISAC Forwarded IRs
   * 2125 - not done - cannot modify resolved due to backward compatibility. Group with communication channels
   * 2121 - not done -
   * 2119 - not done - Consider in protected type proposal - can be done in ADA
   * 2118 - Done
   * 2117 - Block Comment - Done
   * 2114 - Forward to 1076.6 - it is a retired standard
   * 2113 - Forward to 1076 to consider. It is a 1076.6 Request, however, it could be terms more general if we think in of preloading external files to arrays in a Verilog fashion. Language vs. Library? With arrays of unconstrained arrays if we have a standard array of array type, then it would be possible to do this.
   * 2112 - not sure - needs further research
   * 2110 - Not sure needs further research - Jerry K to look into
   * 2109 - Not sure - forward to intefaces / communication channels / protected types.
   * 2108 - Enhancement Request for a level sensitive check - testbench synchronization primitive - language syntax vs procedure, however procedure is problematic as conditions is a constant. Does it activate on any change of condition or just condition at clock edge?
   * Updated [[Vhdl2019ActiveIRTwiki][ISAC - active and resolved issues list]] to reflect the above.
---++ Next Meeting Date:

Thursday April 19, 8 am Pacific
Topic revision: r1 - 2020-02-17 - 15:50:29 - TWikiGuest
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