TWiki
>
P1076 Web
>
Vhdl2019MeetingMinutes
>
2015_MeetingMay28
(2020-02-17,
JimLewis
)
E
dit
A
ttach
P1076 May 28, 2015 Meeting Minutes
Attendees:
*
Brent Hayhoe
,
ErnstChristen
,
LievenLemiengre
,
FarrellOstler
,
JimLewis
,
RyanHinton
, Woody Johnson,
DanielKho
,
Agenda:
Meeting Agenda
Reference Links
Review and Approve Meeting Minutes:
Next Meeting: Thursday June 11, 11 am Pacific
Previous Meeting: Thursday May 14, 2015
Meeting Agenda
Continue to Review Interfaces from
May 14, 2015
Interface Requirements
Support RTL synthesis
Support Testbench
Bundle related data items/objects
No bundle wide operations - ie: assignments
Abstract behavior - potentially via subprograms
Simple - would allow support via translation
Views of an interface
Support generics
An entity supports multiple interfaces
Defaults for interfaces that will not prevent optimizations
Interfaces and/or bundles must work on subprograms
Priorities
1: Bundles for RTL
2: Support everything that a ports support
3: Interface with the kitchen sink
Reference Links
http://www.eda.org/twiki/bin/view.cgi/Sandbox/InterfaceConcepts
Proposals:
Records with Directional Subtypes
-
Peter Flake
Add a "Bus" port mode for bidirectional port signals
-
Brian Drummond
Interface Construct and Port Mode Configurations
-
Brent Hayhoe
Interfaces: Packages as an Interface Construct
-
Jim Lewis
Protected Types with Public Signals
-
Jim Lewis
Protected Type: Shared Variables On Entity Interface
-
Jim Lewis
Record Introspection
-
Chris Higgs
Record Introspection & Indexing
-
Brent Hayhoe
Generics on Protected Types
-
Jim Lewis
IR2067 - Logical link interface abstraction
- Martin Trautmann, analyzed:
Peter Ashenden
IR2076 - a member attribute for records
- Rickard Norberg
IR2089 - Directional Records
- Andreas Doering, never analyzed
IEEE 200X FT-17 - Composite interface mode
-
Jim Lewis
IEEE 200X FT-14 & FT-15 - Arrays of unconstrained arrays and records with unconstrained arrays
-
Ryan Hinton
Documents:
SUAVE Language Description
-
Peter Ashenden
Interfaces
-
Jim Lewis
Object Orientation Revisited
-
Peter Ashenden
Email threads:
vhdl-200x: Requirements for VHDL Interfaces
vhdl-200x: Requirements for Interfaces
vhdl-200x: Re: Requirements for Interfaces, Part 1
vhdl-200x: Re: Requirements for Interfaces, Part 2
VHDL Interfaces (was RE: EXTERNAL: Re: vhdl-200x: VHDL enhancements wish list)
vhdl-200x: Directional records proposal
{Disarmed} Re: vhdl-200x: Directional records proposal
vhdl-200x: Records with diectional subtypes
vhdl-200x: Interfaces with normal, conjugated and monitor flavours
Review and Approve Meeting Minutes:
Motion: Lieven 2nd: Brent
Next Meeting: Thursday June 11, 11 am Pacific
Previous Meeting: Thursday
May 14, 2015
E
dit
|
A
ttach
|
P
rint version
|
H
istory
: r5
<
r4
<
r3
<
r2
<
r1
|
B
acklinks
|
R
aw View
|
Ra
w
edit
|
M
ore topic actions
Topic revision: r5 - 2020-02-17 - 15:36:15 -
JimLewis
P1076
Log In
or
Register
P1076 Web
Create New Topic
Index
Search
Changes
Notifications
RSS Feed
Statistics
Preferences
Webs
Main
P1076
Ballots
LCS2016_080
P10761
P1647
P16661
P1685
P1734
P1735
P1778
P1800
P1801
Sandbox
TWiki
VIP
VerilogAMS
Copyright © 2008-2025 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
Ideas, requests, problems regarding TWiki?
Send feedback