[1076.1] Information on proposed IP support in VHDL-200X

Dear 1076.1 Working Group member,

A couple of months ago, there was some discussion about the support of 
encryption/decryption for VHDL-AMS models. Ernst Christen mentioned the 
ongoing effort in the VHDL-200X working group 
(http://www.eda-stds.org/vhdl-200x/). Since then, I discussed with Lance 
Thomson, Chair of the Accellera Technical Committee in charge of 
developing the new VHDL LRM to be submitted to IEEE for revision. We 
agreed to provide the 1076.1 WG members with documents for information 
and review. Three documents on IP protection may be then downloaded at 
the following URLs:

http://www.accellera.org/apps/group_public/download.php/532/VHDL_IP_Proposal_V9.doc
The original proposal put forward by the VHDL TC extensions committee. 
It is derived from a donation from Cadence which was derived from their 
donation to Verilog.

http://www.accellera.org/apps/group_public/download.php/634/IP-requirements.pdf
A reworked document fixing the low security level provided by some of 
the use models. This is the base for the new 1076-2006 LRM.

http://www.accellera.org/apps/group_public/download.php/682/LCS-2006-140.pdf
Actual LRM text that has been added to VHDL (P1076-2006-D2.11) which is 
currently under review.

If you have questions or comments about the proposed IP support, I would 
suggest to carry the discussion to *both* the 1076.1 and the VHDL-200X 
mailing list (go to the VHDL-200X web site to subscribe).
The IP protection proposal that is being developed is pretty general and 
should be applicable to 1076.1 models as well. A more detailed review 
might however reveal some issues specifically related to AMS models. But 
so far the ownership of the proposal belongs to the VHDL-200X Working Group.

Best regards,
Alain Vachoux